The present invention relates to a differential amplifier suited for reduction of the power source voltage and the power consumption and to a semiconductor integrated circuit provided with the differential amplifier.
The operation of a conventional differential amplifier will be briefly described below.
FIG. 1 shows an exemplary conventional differential amplifier using a current mirror circuit. The differential amplifier is comprised of n-channel MOS transistors MN1, MN2 and p-channel MOS transistors MP1, MP2. A first input voltage VIN1 is fed to the gate of the transistor MN1, and the source of the transistor MN1 is grounded. The drain of the transistor MN1 is connected to the drain of the transistor MP1, the gate of the transistor MP1 and the gate of the transistor MP2. The potential at this node N1 is designated as VN1. Fed to the sources of the transistor MP1 and the transistor MP2 are for instance the power source voltage. A second input voltage VIN2 is fed to the gate of the transistor MN2, and the source of the transistor MN2 is grounded. The node between the drain of the transistor MP2 and the drain of the transistor MN2 is used as an output terminal, from which an output voltage VOUT is outputted.
The differential amplifier detects the potential difference between the input voltage VIN1 and the input voltage VIN2 and outputs the output voltage VOUT corresponding to the thus detected potential difference.
For instance, in case the voltage VIN1 is higher than the voltage VIN2, the driving ability of the transistor MN1 becomes greater than the driving ability of the transistor MN2. As a result, the potential VN1 becomes lower than the output voltage VOUT. The output voltage VOUT in this case is designated as VOUTL.
Further, in case the voltage VIN1 is lower than the voltage VIN2, the potential VN1 becomes higher than the output voltage VOUT. The output voltage VOUT in this case is designated as VOUTH.
Further, the amplification degree A of this differential amplifier is defined by the following equation: EQU A=.vertline.VOUTH-VOUTL.vertline./.vertline.VIN1-VIN2.vertline.
Here, examination is to be made on the Vg (gate voltage)-Id (drain current) characteristic of an n-channel MOS transistor.
FIG. 2 shows the Vg-Id characteristic of an n-channel MOS transistor. The operating range of the transistor can be divided into a strong inversion zone in which the gate voltage Vg is higher than the threshold voltage VT and a weak inversion zone in which the gate voltage Vg is lower than the threshold voltage VT. The amount of variation of the drain current Id with respect to the gate voltage Vg in the strong inversion zone is smaller than that in the weak inversion zone.
In the case of a conventional differential amplifier, the transistors are used exclusively in the strong inversion zone. Due thereto, there arises the problem that the amplification degree of the differential amplifier is low, and no sufficient amplification can be effected when the amplitude of the input voltage is extremely small.
Further, in the case of a differential amplifier circuit which need not be operated at high speed, the power consumption is increased if the transistors are made to operate in the strong inversion zone.
As stated above, the amplification degree of a differential amplifier which operates in the strong inversion zone is small and the power consumption thereof is large; and thus, it is difficult to use such a differential amplifier in a semiconductor integrated circuit such as, e.g. a band gap reference circuit which is provided therein with a differential amplifier, particularly, required to have accuracy.